APA (7. basım) Alıntı

Jayanthy, S., & Bhuvaneswari, M. (2019). Test Generation of Crosstalk Delay Faults in VLSI Circuits (1st ed. 2019.). Springer Nature Singapore. https://doi.org/10.1007/978-981-13-2493-2

Chicago Style (17. basım) Atıf

Jayanthy, S., ve M.C Bhuvaneswari. Test Generation of Crosstalk Delay Faults in VLSI Circuits. 1st ed. 2019. Singapore: Springer Nature Singapore, 2019. https://doi.org/10.1007/978-981-13-2493-2.

MLA (9th ed.) Atıf

Jayanthy, S., ve M.C Bhuvaneswari. Test Generation of Crosstalk Delay Faults in VLSI Circuits. 1st ed. 2019. Springer Nature Singapore, 2019. https://doi.org/10.1007/978-981-13-2493-2.