Test Generation of Crosstalk Delay Faults in VLSI Circuits

This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on cu...

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Bibliographic Details
Main Authors: Jayanthy, S. (Author), Bhuvaneswari, M.C (Author)
Corporate Author: SpringerLink (Online service)
Format: e-Book
Language:English
Published: Singapore : Springer Nature Singapore : 2019.
Imprint: Springer,
Edition:1st ed. 2019.
Subjects:
Electronic circuits.
Microprogramming .
Computers.
Logic design.
Electronic Circuits and Systems.
Control Structures and Microprogramming.
Hardware Performance and Reliability.
Logic Design.
Online Access:Full-text access
Description
Summary:This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing.
Physical Description:XI, 156 p. 49 illus., 7 illus. in color. online resource.
ISBN:9789811324932
DOI:10.1007/978-981-13-2493-2

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