Memory Controllers for Mixed-Time-Criticality Systems Architectures, Methodologies and Trade-offs /

This book discusses the design and performance analysis of SDRAM controllers that cater to both real-time and best-effort applications, i.e. mixed-time-criticality memory controllers. The authors describe the state of the art, and then focus on an architecture template for reconfigurable memory cont...

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Bibliographic Details
Main Authors: Goossens, Sven (Author), Chandrasekar, Karthik (Author), Akesson, Benny (Author), Goossens, Kees (Author)
Corporate Author: SpringerLink (Online service)
Format: e-Book
Language:English
Published: Cham : Springer International Publishing : Imprint: Springer, 2016.
Edition:1st ed. 2016.
Series:Embedded Systems,
Subjects:
Electronic circuits.
Microprocessors.
Computer architecture.
Electronics.
Electronic Circuits and Systems.
Processor Architectures.
Electronics and Microelectronics, Instrumentation.
Online Access:Full-text access
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Description
Summary:This book discusses the design and performance analysis of SDRAM controllers that cater to both real-time and best-effort applications, i.e. mixed-time-criticality memory controllers. The authors describe the state of the art, and then focus on an architecture template for reconfigurable memory controllers that addresses effectively the quickly evolving set of SDRAM standards, in terms of worst-case timing and power analysis, as well as implementation. A prototype implementation of the controller in SystemC and synthesizable VHDL for an FPGA development board are used as a proof of concept of the architecture template.
Physical Description:XXVII, 202 p. 78 illus. in color. online resource.
ISBN:9783319320946
ISSN:2193-0163
DOI:10.1007/978-3-319-32094-6

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