APA (7th ed.) Citation

Barkalov, A., Titarenko, L., Kolopienczyk, M., Mielcarek, K., & Bazydlo, G. (2016). Logic Synthesis for FPGA-Based Finite State Machines (1st ed. 2016.). Springer International Publishing : Imprint: Springer. https://doi.org/10.1007/978-3-319-24202-6

Chicago Style (17th ed.) Citation

Barkalov, Alexander, Larysa Titarenko, Malgorzata Kolopienczyk, Kamil Mielcarek, and Grzegorz Bazydlo. Logic Synthesis for FPGA-Based Finite State Machines. 1st ed. 2016. Cham: Springer International Publishing : Imprint: Springer, 2016. https://doi.org/10.1007/978-3-319-24202-6.

MLA (9th ed.) Citation

Barkalov, Alexander, et al. Logic Synthesis for FPGA-Based Finite State Machines. 1st ed. 2016. Springer International Publishing : Imprint: Springer, 2016. https://doi.org/10.1007/978-3-319-24202-6.