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Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
This book introduces readers to a variety of tools for automatic analog integrated circuit (IC) sizing and optimization. The authors provide a historical perspective on the early methods proposed to tackle automatic analog circuit sizing, with emphasis on the methodologies to size and optimize the c...
| Main Authors: | , , |
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| Corporate Author: | |
| Format: | e-Book |
| Language: | English |
| Published: |
Cham :
Springer International Publishing : Imprint: Springer,
2017.
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| Edition: | 1st ed. 2017. |
| Subjects: | |
| Online Access: | Full-text access View in OPAC |
Table of Contents:
- Introduction
- Previous Works on Automatic Analog IC Sizing
- AIDA-C Architecture
- Multi-Objective Optimization Kernel
- AIDA-C Circuit Sizing Results
- Layout-Aware Circuit Sizing
- AIDA-C Layout-aware Circuit Sizing Results
- Conclusions.